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isplsi 3256e in-system programmable high density pld 3256e_07 1 features high-density programmable logic 256 i/o pins 12000 pld gates 512 registers high speed global interconnect wide input gating for fast counters, state machines, address decoders, etc. small logic block size for random logic high performance e 2 cmos technology f max = 100 mhz maximum operating frequency t pd = 10 ns propagation delay ttl compatible inputs and outputs electrically erasable and reprogrammable non-volatile 100% tested at time of manufacture unused product term shutdown saves power in-system programmable ?5v in-system programmable (isp) using lattice isp or boundary scan test (ieee 1149.1) protocol ?increased manufacturing yields, reduced time-to- market, and improved product quality ?reprogram soldered devices for faster debugging 100% ieee 1149.1 boundary scan compatible offers the ease of use and fast system speed of plds with the density and flexibility of field programmable gate arrays complete programmable device can combine glue logic and structured designs five dedicated clock input pins synchronous and asynchronous clocks programmable output slew rate control to mini- mize switching noise flexible pin placement optimized global routing pool provides global interconnectivity ispexpert ?logic compiler and complete isp device design systems from hdl synthesis through in-system programming superior quality of results tightly integrated with leading cae vendor tools productivity enhancing timing analyzer, explore tools, timing simulator and ispanalyzer pc and unix platforms functional block diagram c0 c1 c2 c3 orp orp global routing pool orp d0 d1 d2 d3 h3 h2 h1 h0 g3 g2 g1 g0 b0 b1 b2 b3 boundary scan or array dq dq dq dq twin glb or array dq dq dq dq and array orp a0 a1 a2 a3 e3 e2 e1 e0 f3 f2 f1 f0 0139a/3256e orp orp orp orp orp orp orp orp orp orp orp orp description the isplsi 3256e is a high density programmable logic device containing 512 registers, 256 universal i/o pins, five dedicated clock input pins, 16 output routing pools (orp) and a global routing pool (grp) which allows complete inter-connectivity between all of these ele- ments. the isplsi 3256e features 5v in-system programmability and in-system diagnostic capabilities. the isplsi 3256e offers non-volatile reprogrammability of the logic, as well as the interconnect to provide truly reconfigurable systems. the basic unit of logic on the isplsi 3256e device is the twin generic logic block (twin glb) labelled a0, a1...h3. there are a total of 32 twin glbs in the isplsi 3256e device. each twin glb has 24 inputs, a programmable and array and two or/exclusive-or arrays and eight outputs which can be configured to be either combinato- rial or registered. all twin glb inputs come from the grp. copyright ?1999 lattice semiconductor corp. all brand or product names are trademarks or registered trademarks of their respec tive holders. the specifications and information herein are subject to change without notice. lattice semiconductor corp., 5555 northeast moore ct., hillsboro, oregon 97124, u.s.a. may 1999 tel. (503) 268-8000; 1-800-lattice; fax (503) 268-8037; http://www.latticesemi.com
specifications isplsi 3256e 2 functional block diagram figure 1. isplsi 3256e functional block diagram orp global routing pool (grp) clk 1 clk 0 clk 2 ioclk 1 ioclk 0 h3 h2 h1 h0 e3 e2 e1 e0 f3 f2 f1 f0 goe0 goe1 toe isp and boundary scan tap reset y0 orp g3 g2 g1 g0 c0 c1 c2 c3 d0 d1 d2 d3 b0 b1 b2 b3 a0 a1 a2 a3 orp orp y1 y2 y3 y4 input bus input bus input bus input bus input bus input bus input bus input bus bscan/ispen tdi/sdi tclk/sclk tms/mode trst tdo/sdo 0139isp/3256e generic logic blocks i/o 24 i/o 26 i/o 28 i/o 30 i/o 25 i/o 27 i/o 29 i/o 31 i/o 8 i/o 10 i/o 12 i/o 14 i/o 9 i/o 11 i/o 13 i/o 15 i/o 0 i/o 2 i/o 4 i/o 6 i/o 1 i/o 3 i/o 5 i/o 7 i/o 16 i/o 18 i/o 20 i/o 22 i/o 17 i/o 19 i/o 21 i/o 23 i/o 96 i/o 98 i/o 100 i/o 102 i/o 97 i/o 99 i/o 101 i/o 103 i/o 104 i/o 106 i/o 108 i/o 110 i/o 105 i/o 107 i/o 109 i/o 111 i/o 112 i/o 114 i/o 116 i/o 118 i/o 113 i/o 115 i/o 117 i/o 119 i/o 120 i/o 122 i/o 124 i/o 126 i/o 121 i/o 123 i/o 125 i/o 127 i/o 88 i/o 90 i/o 92 i/o 94 i/o 80 i/o 82 i/o 84 i/o 86 i/o 72 i/o 74 i/o 76 i/o 78 i/o 64 i/o 66 i/o 68 i/o 70 i/o 65 i/o 67 i/o 89 i/o 91 i/o 93 i/o 95 i/o 81 i/o 83 i/o 85 i/o 87 i/o 73 i/o 75 i/o 77 i/o 79 i/o 69 i/o 71 i/o 56 i/o 58 i/o 60 i/o 62 i/o 57 i/o 59 i/o 61 i/o 63 i/o 48 i/o 50 i/o 52 i/o 54 i/o 49 i/o 51 i/o 53 i/o 55 i/o 40 i/o 42 i/o 44 i/o 46 i/o 41 i/o 43 i/o 45 i/o 47 i/o 32 i/o 34 i/o 36 i/o 38 i/o 33 i/o 35 i/o 37 i/o 39 i/o 190 i/o 188 i/o 186 i/o 184 i/o 191 i/o 189 i/o 187 i/o 185 i/o 182 i/o 180 i/o 178 i/o 176 i/o 183 i/o 181 i/o 179 i/o 177 i/o 166 i/o 164 i/o 162 i/o 160 i/o 167 i/o 165 i/o 163 i/o 161 i/o 174 i/o 172 i/o 170 i/o 168 i/o 175 i/o 173 i/o 171 i/o 169 i/o 158 i/o 156 i/o 154 i/o 152 i/o 159 i/o 157 i/o 155 i/o 153 i/o 150 i/o 148 i/o 146 i/o 144 i/o 151 i/o 149 i/o 147 i/o 145 i/o 134 i/o 132 i/o 130 i/o 128 i/o 135 i/o 133 i/o 131 i/o 129 i/o 142 i/o 140 i/o 138 i/o 136 i/o 143 i/o 141 i/o 139 i/o 137 i/o 254 i/o 252 i/o 250 i/o 248 i/o 255 i/o 253 i/o 251 i/o 249 i/o 246 i/o 244 i/o 242 i/o 240 i/o 247 i/o 245 i/o 243 i/o 241 i/o 230 i/o 228 i/o 226 i/o 224 i/o 231 i/o 229 i/o 227 i/o 225 i/o 238 i/o 236 i/o 234 i/o 232 i/o 239 i/o 237 i/o 235 i/o 233 i/o 222 i/o 220 i/o 218 i/o 216 i/o 223 i/o 221 i/o 219 i/o 217 i/o 214 i/o 212 i/o 210 i/o 208 i/o 215 i/o 213 i/o 211 i/o 209 i/o 198 i/o 196 i/o 194 i/o 192 i/o 199 i/o 197 i/o 195 i/o 193 i/o 206 i/o 204 i/o 202 i/o 200 i/o 207 i/o 205 i/o 203 i/o 201 megablock orp orp orp orp orp orp orp orp orp orp orp orp
specifications isplsi 3256e 3 description (continued) all local logic block outputs are brought back into the grp so they can be connected to the inputs of any other logic block on the device. the device also has 256 i/o cells, each of which is directly connected to an i/o pin. each i/o cell can be individually programmed to be a combinatorial input, a registered input, a latched input, an output or a bidirectional i/o pin with 3-state control. the signal levels are ttl compatible voltages and the output drivers can source 4 ma or sink 8 ma. each output can be programmed independently for fast or slow output slew rate to minimize overall output switching noise. the 256 i/o cells are grouped into 16 sets of 16 bits. pairs of these i/o groups are associated with a logic megablock through the use of the orp. each megablock is able to provide one product term output enable (ptoe) signal which is globally distributed to all i/o cells. that ptoe signal can be generated within any glb in the megablock. each i/o cell can select either a global oe or a ptoe. four twin glbs, 32 i/o cells and two orps are con- nected together to make a logic megablock. the megablock is defined by the resources that it shares. the outputs of the four twin glbs are connected to a set of 32 i/o cells by the orp. the isplsi 3256e device contains eight of these megablocks. the grp has as its inputs the outputs from all of the twin glbs and all of the inputs from the bidirectional i/o cells. all of these signals are made available to the inputs of the twin glbs. delays through the grp have been equal- ized to minimize timing skew and logic glitching. clocks in the isplsi 3256e device are provided through five dedicated clock pins. the five pins provide three clocks to the twin glbs and two clocks to the i/o cells. the table below lists key attributes of the device along with the number of resources available. an additional feature of the isplsi 3256e is its boundary scan capability, which is composed of cells connected between the on-chip system logic and the device? input and output pins. all i/o pins have associated boundary scan registers, with 3-state i/o using three boundary scan registers and inputs using one. the isplsi 3256e supports all ieee 1149.1 mandatory instructions, which include bypass, extest and sample. key attributes of the isplsi 3256e e t u b i r t t ay t i t n a u q s b l g n i w t 2 3 s r e t s i g e r 2 1 5 s n i p o / i 6 5 2 s k c o l c l a b o l g 5 e o l a b o l g 2 e o t s e t 1 e 6 5 2 3 / 3 0 0 - e l b a t
specifications isplsi 3256e 4 absolute maximum ratings 1 supply voltage v cc ........................................................................... -0.5 to +7.0v input voltage applied ........................................................................ -2.5 to v cc +1.0v off-state output voltage applied ..................................................... -2.5 to v cc +1.0v storage temperature ........................................................................ -65 to 150 c case temp. with power applied ...................................................... -55 to 125 c max. junction temp. (t j ) with power applied (304-pin mqfp) ...... 150 c max. junction temp. (t j ) with power applied (320-ball bga) ........ 140 c 1. stresses above those listed under the absolute maximum ratings may cause permanent damage to the device. functional operation of the device at these or at any other conditions above those indicated in the operational sections of this specifica tion is not implied (while programming, follow the programming specifications). dc recommended operating condition capacitance (t a =25 c,f=1.0 mhz) symbol table 2-0006/3256e c parameter clock capacitance 15 units typical test conditions 2 pf v = 5.0v, v = 2.0v cc y c i/o capacitance 10 1 pf v = 5.0v, v = 2.0v cc i/o data retention specifications table 2-0008/3256e parameter data retention minimum maximum units isplsi erase/reprogram cycles 20 10000 years cycles t a symbol table 2-0005/3256e v cc v ih v il parameter ambient temperature supply voltage input high voltage input low voltage min. max. units 0 4.75 2.0 0 70 5.25 v +1 0.8 c v v v cc
specifications isplsi 3256e 5 switching test conditions input pulse levels table 2-0003/3256e input rise and fall time input timing reference levels output timing reference levels output load gnd to 3.0v 3ns 10% to 90% 1.5v 1.5v see figure 2 3-state levels are measured 0.5v from steady-state active level. output load conditions (see figure 2) test condition r1 r2 cl a 470 ? 390 ? 35pf b 390 ? 35pf 470 ? 390 ? 35pf active high active low c 470 ? 390 ? 5pf 390 ? 5pf active low to z at v +0.5v ol active high to z at v -0.5v oh table 2 - 0004a figure 2. test load + 5v r 1 r 2 c l * device output test point * c l includes test fixture and probe capacitance. 0213a dc electrical characteristics over recommended operating conditions v ol symbol 1. one output at a time for a maximum duration of one second. v = 0.5v was selected to avoid test problems by tester ground degradation. characterized but not 100% tested. 2. measured using sixteen 16-bit counters. 3. typical values are at v cc = 5v and t a = 25 c. 4. maximum i cc varies widely with specific device configuration and operating frequency. refer to the power consumption section of this datasheet and thermal management section of the lattice semiconductor data book or cd-rom to estimate maximum i cc . table 2 - 0007isp/3256e 1 v oh i ih i il i il-isp parameter i il-pu i os 2,4 i cc output low voltage output high voltage input or i/o high leakage current input or i/o low leakage current bscan/ispen input low leakage current i/o active pull-up current output short circuit current operating power supply current i = 8 ma i = -4 ma 3.5v v v 0v v v (max.) 0v v v 0v v v v = 5v, v = 0.5v v = 0.0v, v = 3.0v f = 1 mhz ol oh in il in cc in il in il cc out toggle il ih condition min. typ. max. units 3 2.4 300 0.4 10 -10 -150 -150 -200 v v a a a a ma ma out
specifications isplsi 3256e 6 external switching characteristics 1, 2, 3 over recommended operating conditions r e t e m a r a p t s e t 5 . d n o c # 2 n o i t p i r c s e d 1 0 0 1 -0 7 - s t i n u . n i m. x a m. n i m. x a m t 1 d p a1 s s a p y b p r o , s s a p y b t p 4 , y a l e d . p o r p a t a d 0 . 0 1 0 . 5 1s n t 2 d p a2 y a l e d n o i t a g a p o r p a t a d 0 . 3 1 0 . 8 1s n f x a m a3 k c a b d e e f l a n r e t n i h t i w y c n e u q e r f k c o l c 3 0 0 1 0 . 0 7 z h m f ) . t x e ( x a m 4) 1 o c t + 2 u s t ( / 1 , k c a b d e e f . t x e h t i w . q e r f k c o l c0 . 7 7 0 . 0 5 z h m f ) . g o t ( x a m 5e l g g o t x a m , y c n e u q e r f k c o l c 4 0 0 1 0 . 3 8 z h m t 1 u s 6s s a p y b t p 4 , k c o l c e r o f e b e m i t p u t e s . g e r b l g5 . 5 0 . 9 s n t 1 o c a7 s s a p y b p r o , y a l e d t u p t u o o t k c o l c . g e r b l g 5 . 6 0 . 9s n t 1 h 8s s a p y b t p 4 , k c o l c r e t f a e m i t d l o h . g e r b l g0 . 0 0 . 0 s n t 2 u s 9k c o l c e r o f e b e m i t p u t e s . g e r b l g5 . 6 0 . 1 1 s n t 2 o c 0 1y a l e d t u p t u o o t k c o l c . g e r b l g 0 . 7 0 . 0 1s n t 2 h 1 1k c o l c r e t f a e m i t d l o h . g e r b l g0 . 0 0 . 0 s n t 1 r a2 1y a l e d t u p t u o o t n i p t e s e r . t x e 5 . 3 1 0 . 5 1s n t 1 w r 3 1n o i t a r u d e s l u p t e s e r . t x e5 . 6 0 . 2 1 s n t n e e o t p b4 1e l b a n e t u p t u o o t t u p n i 0 . 6 1 0 . 9 1s n t s i d e o t p c5 1e l b a s i d t u p t u o o t t u p n i 0 . 6 1 0 . 9 1s n t n e e o g b6 1e l b a n e t u p t u o e o l a b o l g 0 . 9 0 . 2 1s n t s i d e o g c7 1e l b a s i d t u p t u o e o l a b o l g 0 . 9 0 . 2 1s n t n e e o t 8 1e l b a n e t u p t u o e o t s e t 0 . 2 1 0 . 5 1s n t s i d e o t 9 1e l b a s i d t u p t u o e o t s e t 0 . 2 1 0 . 5 1s n t h w 0 2h g i h , n o i t a r u d e s l u p k c o l c . c n y s . t x e0 . 5 0 . 6 s n t l w 1 2w o l , n o i t a r u d e s l u p k c o l c . c n y s . t x e0 . 5 0 . 6 s n t 3 u s 2 2) 4 y , 3 y ( k c o l c . c n y s . t x e e r o f e b e m i t p u t e s . g e r o / i5 . 4 0 . 5 s n t 3 h 3 2) 4 y , 3 y ( k c o l c . c n y s . t x e r e t f a e m i t d l o h . g e r o / i0 . 0 0 . 0 s n . p r o d n a h t a p r o x t p 0 2 e s u s r e t e m a r a p l l a , e s i w r e h t o d e t o n s s e l n u . 1 . s l i a t e d r e h t r u f r o f t e e h s a t a d s i h t n i l e d o m g n i m i t o t r e f e r . 2 . k c a b d e e f p r g g n i s u r e t n u o c t i b - 6 1 d r a d n a t s . 3 . % 0 5 n a h t r e h t o f o e l c y c y t u d k c o l c a r o f w o l l a o t s i s i h t . ) l w t + h w t ( / 1 n a h t s s e l e b y a m ) e l g g o t ( x a m f . 4 . n o i t c e s s n o i t i d n o c t s e t g n i h c t i w s e c n e r e f e r . 5 s p e . e 6 5 2 3 . t x e g n i m i t
specifications isplsi 3256e 7 internal timing parameters 1 over recommended operating conditions r e t e m a r a p # 2 n o i t p i r c s e d 0 0 1 -0 7 - s t i n u . n i m. x a m. n i m. x a m s t u p n i t p b o i 4 2s s a p y b r e t s i g e r o / i 4 . 2 0 . 4s n t t a l o i 5 2y a l e d h c t a l o / i 3 . 0 1 0 . 4 1s n t u s o i 6 2k c o l c e r o f e b e m i t p u t e s r e t s i g e r o / i8 . 4 8 . 5 s n t h o i 7 2k c o l c r e t f a e m i t d l o h r e t s i g e r o / i6 . 1 - 5 . 2 - s n t o c o i 8 2y a l e d t u o o t k c o l c r e t s i g e r o / i 8 . 5 5 . 8s n t r o i 9 2y a l e d t u o o t t e s e r r e t s i g e r o / i 8 . 5 5 . 7s n p r g t p r g 0 3y a l e d p r g 3 . 2 2 . 3s n b l g t p b t p 4 1 3) . b m o c ( y a l e d h t a p s s a p y b m r e t t c u d o r p 4 2 . 3 6 . 3s n t r b t p 4 2 3) . g e r ( y a l e d h t a p s s a p y b m r e t t c u d o r p 4 1 . 3 8 . 4s n t r o x t p 1 3 3y a l e d h t a p r o x / m r e t t c u d o r p 1 0 . 4 1 . 5s n t r o x t p 0 2 4 3y a l e d h t a p r o x / m r e t t c u d o r p 0 2 1 . 4 2 . 5s n t j d a r o x 5 3y a l e d h t a p t n e c a j d a r o x 3 3 . 4 7 . 5s n t p b g 6 3y a l e d s s a p y b r e t s i g e r b l g 5 . 1 6 . 1s n t u s g 7 3k c o l c e r o f e b e m i t p u t e s r e t s i g e r b l g3 . 0 2 . 1 s n t h g 8 3k c o l c r e t f a e m i t d l o h r e t s i g e r b l g0 . 5 6 . 7 s n t o c g 9 3y a l e d t u p t u o o t k c o l c r e t s i g e r b l g 6 . 1 0 . 3s n t o r g 0 4y a l e d t u p t u o o t t e s e r r e t s i g e r b l g 2 . 5 2 . 5s n t e r t p 1 4y a l e d r e t s i g e r o t t e s e r m r e t t c u d o r p b l g 0 . 4 4 . 4s n t e o t p 2 4y a l e d l l e c o / i o t e l b a n e t u p t u o m r e t t c u d o r p b l g 5 . 6 9 . 6s n t k c t p 3 4y a l e d k c o l c m r e t t c u d o r p b l g0 . 36 . 34 . 32 . 4s n p r o t p r o 4 4y a l e d p r o 2 . 1 9 . 1s n t p b p r o 5 4y a l e d s s a p y b p r o 7 . 0 9 . 0s n . y l n o e c n e r e f e r r o f e r a d n a d e t s e t t o n e r a s r e t e m a r a p g n i m i t l a n r e t n i . 1 . s l i a t e d r e h t r u f r o f t e e h s a t a d s i h t n i l e d o m g n i m i t o t r e f e r . 2 . s o r c a m d r a h y b d e s u e b y l n o n a c h t a p t n e c a j d a r o x e h t . 3 s p e . e 6 5 2 3 . t n i g n i m i t
specifications isplsi 3256e 8 internal timing parameters 1 over recommended operating conditions r e t e m a r a p # 2 n o i t p i r c s e d 0 0 1 -0 7 - s t i n u . n i m. x a m. n i m. x a m s t u p t u o t b o 6 4y a l e d r e f f u b t u p t u o 6 . 2 3 . 3s n t s b o 7 4r e d d a d e t i m i l w e l s , y a l e d r e f f u b t u p t u o 6 . 7 1 3 . 8 1s n t n e o 8 4d e l b a n e t u p t u o o t e o l l e c o / i 5 . 5 7 . 5s n t s i d o 9 4d e l b a s i d t u p t u o o t e o l l e c o / i 5 . 5 7 . 5s n s k c o l c t 2 / 1 / 0 y g 0 5e n i l k l c b l g l a b o l g o t 2 y r o 1 y r o 0 y , y a l e d k c o l c6 . 16 . 18 . 18 . 1s n t 4 / 3 y o i 1 5e n i l k c o l c l a b o l g l l e c o / i o t 4 y r o 3 y , y a l e d k c o l c3 . 06 . 18 . 05 . 2s n t e s e r l a b o l g t r g 2 5s r e t s i g e r o / i d n a b l g o t t e s e r l a b o l g 5 . 4 6 . 4s n t e o g 3 5r e f f u b d a p e o l a b o l g 9 . 5 5 . 7s n t e o t 4 5r e f f u b d a p e o t s e t 1 . 6 9 . 8s n . y l n o e c n e r e f e r r o f e r a d n a d e t s e t t o n e r a s r e t e m a r a p g n i m i t l a n r e t n i . 1 . s l i a t e d r e h t r u f r o f t e e h s a t a d s i h t n i l e d o m g n i m i t o t r e f e r . 2 s p e . e 6 5 2 3 . 2 . t n i g n i m i t
specifications isplsi 3256e 9 isplsi 3256e timing model note: calculations are based upon timing specifications for the isplsi 3256e-100l. glb reg delay i/o pin (output) orp delay feedback 4 pt bypass 20 pt xor delays control pts input register i/o pin (input) y0,1,2 y3,4 d q grp glb reg bypass orp bypass dq rst re oe ck i/o reg bypass i/o cell orp glb grp i/o cell #25 - 29 #30 #32 #31 #33 - 35 #41 - 43 #50 #53 #54 #44 #45 reset #24 #51 rst #52 #52 #36 #37 - 40 #48, 49 #46, 47 goe0,1 toe 0902/3256e derivations of t su, t h and t co from the product term clock 1 = = = = t su logic + reg su - clock (min) ( t iobp + t grp + t 20ptxor) + ( t gsu) - ( t iobp + t grp + t ptck(min)) (#24+ #30+ #34) + (#37) - (#24+ #30+ #43) (2.4 + 2.3 + 4.1) + (0.3) - (2.4 + 2.3 + 3.0) 1.4 ns = = = = t h clock (max) + reg h - logic ( t iobp + t grp + t ptck(max)) + ( t gh) - ( t iobp + t grp + t 20ptxor) (#24+ #30+ #43) + (#38) - (#24+ #30+ #34) (2.4 + 2.3 + 3.6) + (5.0) - (2.4 + 2.3 + 4.1) 4.5 ns = = = = t co clock (max) + reg co + output ( t iobp + t grp + t ptck(max)) + ( t gco) + ( t orp + t ob) (#24 + #30 + #43) + (#39) + (#44 + #46) (2.4 + 2.3 + 3.6) + (1.6) + (1.2 + 2.6) 13.7 ns table 2- 0042-3256e
specifications isplsi 3256e 10 power consumption figure 3 shows the relationship between power and operating speed. power consumption in the isplsi 3256e device depends on two primary factors: the speed at which the device is operating and the number of product terms used. 0127/3256e i cc can be estimated for the isplsi 3256e using the following equation: i cc = 60 + (# of pts * 0.48) + (# of nets * max. freq * 0.0106) where: # of pts = number of product terms used in design # of nets = number of signals used in device max. freq = highest clock frequency to the device the i cc estimate is based on typical conditions (v cc = 5.0v, room temperature) and an assumption of two glb loads on average exists. these values are for estimates only. since the value of i cc is sensitive to operating conditions and the program in the device, the actual i cc should be verified. 200 400 600 500 300 0 20 40 60 80 100 f max (mhz) i cc (ma) notes: configuration of 16 16-bit counters typical current at 5v, 25 c isplsi 3256e figure 3. typical device power consumption vs fmax
specifications isplsi 3256e 11 pin locations goe0, goe1 195, 185 ad11, ac14 toe 215 ac6 reset 53 a17 y0, y1, y2, y3, y4 43, 33, 205, 175, 165 a14, b11, ad8, ab16, aa18 ispen /bscan 63 b19 sdi/tdi 23 c9 sclk/tck 73 d20 mode/tms 13 d7 trst /nc 1 225 aa5 sdo/tdo 155 ab21 gnd 9, 19, 39, 49, 69, 85, 95, 115, 125, 145, 161, 171, d6, c8, b13, a16, d19, f21, h22, n23, t24, w21, 191, 201, 221, 237, 247, 267, 277, 297 aa19, ab17, ac12, ad9, aa6, w4, u3, m2, j1, f4 vcc 1, 29, 59, 77, 105, 135, 153, 181, 211, 229, 257, d4, b10, b18, d21, k23, v23, aa21, ac15, ac7, 287, 304 aa4, r2, g2, c3 nc 1 a1, a2, a23, a24, b1, b2, b23, b24, ac1, ac2, ac23, ac24, ad1, ad2, ad23, ad24 pin description signal 304-pin mqfp 320-ball bga i/o input/output pins these are the general purpose i/o pins used by the logic array. goe0, goe1 global output enable input pins. toe test output enable pin this pin tristates all i/o pins when a logic low is driven. reset active low (0) reset pin resets all of the glb and i/o registers in the device. y0, y1, y2 dedicated clock inputs. these clock inputs are connected to one of the clock inputs of all the glbs on the device. y3, y4 dedicated clock inputs. these clock inputs are connected to one of the clock inputs of all the i/o cells on the device. bscan/ ispen input dedicated in-system programming enable input pin. when this pin is high, the bscan tap controller pins tms, tdi, tdo and tck are enabled. when this pin is brought low, the isp state machine control pins mode, sdi, sdo and sclk are enabled. high-to-low transition of this pin will put the device in the programming mode and put all i/o pins in the high-z state. tdi/sdi input this pin performs two functions. it is the test data input pin when ispen is logic high. when ispen is logic low, it functions as an input pin to load programming data into the device. sdi is also used as one of the two control pins for the isp state machine. tck/sclk input this pin performs two functions. it is the test clock input pin when ispen is logic high. when ispen is logic low, it functions as a clock pin for the serial shift register. tms/mode input this pin performs two functions. it is the test mode select input pin when ispen is logic high. when ispen is logic low, it functions as a pin to control the operation of the isp state machine. trst /nc 1 input test reset, active low to reset the boundary scan state machine. tdo/sdo output this pin performs two functions. when ispen is logic low, it functions as the pin to read the isp data. when ispen is high, it functions as test data out. gnd ground (gnd) vcc vcc nc 1 no connect. pin name description 1. nc pins are not to be connected to any active signals, vcc or gnd. 1. nc pins are not to be connected to any active signals, vcc or gnd.
specifications isplsi 3256e 12 i/o 0 40 c13 i/o 1 41 d13 i/o 2 42 a13 i/o 3 44 b14 i/o 4 45 c14 i/o 5 46 d14 i/o 6 47 a15 i/o 7 48 b15 i/o 8 50 c15 i/o 9 51 d15 i/o 10 52 b16 i/o 11 54 c16 i/o 12 55 b17 i/o 13 56 d16 i/o 14 57 a18 i/o 15 58 c17 i/o 16 60 a19 i/o 17 61 d17 i/o 18 62 c18 i/o 19 64 a20 i/o 20 65 d18 i/o 21 66 c19 i/o 22 67 b20 i/o 23 68 a21 i/o 24 70 c20 i/o 25 71 b21 i/o 26 72 a22 i/o 27 74 c21 i/o 28 75 b22 i/o 29 76 c22 i/o 30 78 c23 i/o 31 79 d22 i/o 32 80 c24 i/o 33 81 e21 i/o 34 82 d23 i/o 35 83 e22 i/o 36 84 d24 i/o 37 86 e23 i/o 38 87 f22 i/o 39 88 e24 i/o 40 89 g21 i/o 41 90 f23 i/o 42 91 g22 i/o 43 92 f24 i/o 44 93 h21 i/o 45 94 g23 i/o 46 96 g24 i/o 47 97 j21 i/o 48 98 h23 i/o 49 99 j22 i/o 50 100 h24 i/o 51 101 j23 i/o 52 102 k21 i/o 53 103 k22 i/o 54 104 j24 i/o 55 106 k24 i/o 56 107 l21 i/o 57 108 l22 i/o 58 109 l23 i/o 59 110 l24 i/o 60 111 m24 i/o 61 112 m21 i/o 62 113 m22 i/o 63 114 m23 i/o 64 116 n22 i/o 65 117 n21 i/o 66 118 n24 i/o 67 119 p24 i/o 68 120 p23 i/o 69 121 p22 i/o 70 122 p21 i/o 71 123 r24 i/o 72 124 r23 i/o 73 126 r22 i/o 74 127 r21 i/o 75 128 t23 i/o 76 129 u24 i/o 77 130 t22 i/o 78 131 u23 i/o 79 132 t21 i/o 80 133 v24 i/o 81 134 u22 i/o 82 136 w24 i/o 83 137 u21 i/o 84 138 v22 i/o 85 139 w23 i/o 86 140 y24 i/o 87 141 v21 i/o 88 142 w22 i/o 89 143 y23 i/o 90 144 aa24 i/o 91 146 y22 i/o 92 147 aa23 i/o 93 148 ab24 i/o 94 149 y21 i/o 95 150 aa22 i/o 96 151 ab23 i/o 97 152 ab22 i/o 98 154 ac22 i/o 99 156 ad22 i/o 100 157 aa20 i/o 101 158 ac21 i/o 102 159 ab20 i/o 103 160 ad21 i/o 104 162 ac20 i/o 105 163 ab19 i/o 106 164 ad20 i/o 107 166 ac19 i/o 108 167 ab18 i/o 109 168 ad19 i/o 110 169 aa17 i/o 111 170 ac18 i/o 112 172 ad18 i/o 113 173 aa16 i/o 114 174 ac17 i/o 115 176 ad17 i/o 116 177 ac16 i/o 117 178 aa15 i/o 118 179 ab15 i/o 119 180 ad16 i/o 120 182 ad15 i/o 121 183 aa14 i/o 122 184 ab14 i/o 123 186 ad14 i/o 124 187 ad13 i/o 125 188 aa13 i/o 126 189 ab13 i/o 127 190 ac13 i/o 128 192 ab12 i/o 129 193 aa12 i/o 130 194 ad12 i/o 131 196 ac11 i/o 132 197 ab11 i/o 133 198 aa11 i/o 134 199 ad10 i/o 135 200 ac10 i/o 136 202 ab10 i/o 137 203 aa10 i/o 138 204 ac9 i/o 139 206 ab9 i/o 140 207 ac8 i/o 141 208 aa9 i/o 142 209 ad7 i/o 143 210 ab8 i/o 144 212 ad6 i/o 145 213 aa8 i/o 146 214 ab7 i/o 147 216 ad5 i/o 148 217 aa7 i/o 149 218 ab6 i/o 150 219 ac5 i/o 151 220 ad4 i/o 152 222 ab5 i/o 153 223 ac4 i/o 154 224 ad3 i/o 155 226 ab4 i/o 156 227 ac3 i/o 157 228 ab3 i/o 158 230 ab2 i/o 159 231 aa3 i/o 160 232 ab1 i/o 161 233 y4 i/o 162 234 aa2 i/o 163 235 y3 i/o 164 236 aa1 i/o 165 238 y2 i/o 166 239 w3 i/o 167 240 y1 i/o 168 241 v4 i/o 169 242 w2 i/o 170 243 v3 i/o 171 244 w1 i/o 172 245 u4 i/o 173 246 v2 i/o 174 248 v1 i/o 175 249 t4 i/o 176 250 u2 i/o 177 251 t3 i/o 178 252 u1 i/o 179 253 t2 i/o 180 254 r4 i/o 181 255 r3 i/o 182 256 t1 i/o 183 258 r1 i/o 184 259 p4 i/o 185 260 p3 i/o 186 261 p2 i/o 187 262 p1 i/o 188 263 n1 i/o 189 264 n4 i/o 190 265 n3 i/o 191 266 n2 i/o 192 268 m3 i/o 193 269 m4 i/o 194 270 m1 i/o 195 271 l1 i/o 196 272 l2 i/o 197 273 l3 i/o 198 274 l4 i/o 199 275 k1 i/o 200 276 k2 i/o 201 278 k3 i/o 202 279 k4 i/o 203 280 j2 i/o 204 281 h1 i/o 205 282 j3 i/o 206 283 h2 i/o 207 284 j4 i/o 208 285 g1 i/o 209 286 h3 i/o 210 288 f1 i/o 211 289 h4 i/o 212 290 g3 i/o 213 291 f2 i/o 214 292 e1 i/o 215 293 g4 i/o 216 294 f3 i/o 217 295 e2 i/o 218 296 d1 i/o 219 298 e3 i/o 220 299 d2 i/o 221 300 c1 i/o 222 301 e4 i/o 223 302 d3 i/o 224 303 c2 i/o 225 2 b3 i/o 226 3 c4 i/o 227 4 a3 i/o 228 5 d5 i/o 229 6 b4 i/o 230 7 c5 i/o 231 8 a4 i/o 232 10 b5 i/o 233 11 c6 i/o 234 12 a5 i/o 235 14 b6 i/o 236 15 c7 i/o 237 16 a6 i/o 238 17 d8 i/o 239 18 b7 i/o 240 20 a7 i/o 241 21 d9 i/o 242 22 b8 i/o 243 24 a8 i/o 244 25 b9 i/o 245 26 d10 i/o 246 27 c10 i/o 247 28 a9 i/o 248 30 a10 i/o 249 31 d11 i/o 250 32 c11 i/o 251 34 a11 i/o 252 35 a12 i/o 253 36 d12 i/o 254 37 c12 i/o 255 38 b12 i/o locations signal mqfp bga signal mqfp bga signal mqfp bga signal mqfp bga signal mqfp bga
specifications isplsi 3256e 13 pin configuration isplsi 3256e 304-pin mqfp pinout diagram 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 228 227 226 225 224 223 222 221 220 219 218 217 216 215 214 213 212 211 210 209 208 207 206 205 204 203 202 201 200 199 198 197 196 195 194 193 192 191 190 189 188 187 186 185 184 183 182 181 180 179 178 177 176 175 174 173 172 171 170 169 168 167 166 165 164 163 162 161 160 159 158 157 156 155 154 153 304 303 302 301 300 299 298 297 296 295 294 293 292 291 290 289 288 287 286 285 284 283 282 281 280 279 278 277 276 275 274 273 272 271 270 269 268 267 266 265 264 263 262 261 260 259 258 257 256 255 254 253 252 251 250 249 248 247 246 245 244 243 242 241 240 239 238 237 236 235 234 233 232 231 230 229 vcc i/o 225 i/o 226 i/o 227 i/o 228 i/o 229 i/o 230 i/o 231 gnd i/o 232 i/o 233 i/o 234 mode/tms i/o 235 i/o 236 i/o 237 i/o 238 i/o 239 gnd i/o 240 i/o 241 i/o 242 sdi/tdi i/o 243 i/o 244 i/o 245 i/o 246 i/o 247 vcc i/o 248 i/o 249 i/o 250 y1 i/o 251 i/o 252 i/o 253 i/o 254 i/o 255 gnd i/o 0 i/o 1 i/o 2 y0 i/o 3 i/o 4 i/o 5 i/o 6 i/o 7 gnd i/o 8 i/o 9 i/o 10 reset i/o 11 i/o 12 i/o 13 i/o 14 i/o 15 vcc i/o 16 i/o 17 i/o 18 ispen/bscan i/o 19 i/o 20 i/o 21 i/o 22 i/o 23 gnd i/o 24 i/o 25 i/o 26 sclk/tck i/o 27 i/o 28 i/o 29 vcc i/o 30 i/o 31 i/o 32 i/o 33 i/o 34 i/o 35 i/o 36 gnd i/o 37 i/o 38 i/o 39 i/o 40 i/o 41 i/o 42 i/o 43 i/o 44 i/o 45 gnd i/o 46 i/o 47 i/o 48 i/o 49 i/o 50 i/o 51 i/o 52 i/o 53 i/o 54 vcc i/o 55 i/o 56 i/o 57 i/o 58 i/o 59 i/o 60 i/o 61 i/o 62 i/o 63 gnd i/o 64 i/o 65 i/o 66 i/o 67 i/o 68 i/o 69 i/o 70 i/o 71 i/o 72 gnd i/o 73 i/o 74 i/o 75 i/o 76 i/o 77 i/o 78 i/o 79 i/o 80 i/o 81 vcc i/o 82 i/o 83 i/o 84 i/o 85 i/o 86 i/o 87 i/o 88 i/o 89 i/o 90 gnd i/o 91 i/o 92 i/o 93 i/o 94 i/o 95 i/o 96 i/o 97 i/o 157 i/o 156 i/o 155 trst/nc 1 i/o 154 i/o 153 i/o 152 gnd i/o 151 i/o 150 i/o 149 i/o 148 i/o 147 toe i/o 146 i/o 145 i/o 144 vcc i/o 143 i/o 142 i/o 141 i/o 140 i/o 139 y2 i/o 138 i/o 137 i/o 136 gnd i/o 135 i/o 134 i/o 133 i/o 132 i/o 131 goe0 i/o 130 i/o 129 i/o 128 gnd i/o 127 i/o 126 i/o 125 i/o 124 i/o 123 goe1 i/o 122 i/o 121 i/o 120 vcc i/o 119 i/o 118 i/o 117 i/o 116 i/o 115 y3 i/o 114 i/o 113 i/o 112 gnd i/o 111 i/o 110 i/o 109 i/o 108 i/o 107 y4 i/o 106 i/o 105 i/o 104 gnd i/o 103 i/o 102 i/o 101 i/o 100 i/o 99 sdo/tdo i/o 98 vcc vcc i/o 224 i/o 223 i/o 222 i/o 221 i/o 220 i/o 219 gnd i/o 218 i/o 217 i/o 216 i/o 215 i/o 214 i/o 213 i/o 212 i/o 211 i/o 210 vcc i/o 209 i/o 208 i/o 207 i/o 206 i/o 205 i/o 204 i/o 203 i/o 202 i/o 201 gnd i/o 200 i/o 199 i/o 198 i/o 197 i/o 196 i/o 195 i/o 194 i/o 193 i/o 192 gnd i/o 191 i/o 190 i/o 189 i/o 188 i/o 187 i/o 186 i/o 185 i/o 184 i/o 183 vcc i/o 182 i/o 181 i/o 180 i/o 179 i/o 178 i/o 177 i/o 176 i/o 175 i/o 174 gnd i/o 173 i/o 172 i/o 171 i/o 170 i/o 169 i/o 168 i/o 167 i/o 166 i/o 165 gnd i/o 164 i/o 163 i/o 162 i/o 161 i/o 160 i/o 159 i/o 158 vcc isplsi 3256e top view 304mqfp.3256e 1. nc pins are not to be connected to any active signals, vcc or gnd.
specifications isplsi 3256e 14 signal configuration isplsi 3256e 320-ball bga signal diagram 1. nc pins are not to be connected to any active signals, vcc or gnd. note: ball a1 indicator dot on top side of package. isplsi 3256e bottom view 242322212019181716151413121110987654321 a a b b c c d d e e f f g g h h j j k k l l m m n n p p r r t t u u v v w w y y aa aa ab ab ac ac ad ad 242322212019181716151413121110987654321 nc 1 nc 1 nc 1 gnd gnd gnd gnd gnd gnd y4 gnd gnd y3 vcc vcc vcc vcc nc 1 nc 1 nc 1 nc 1 nc 1 nc 1 nc 1 nc 1 nc 1 nc 1 nc 1 toe vcc gnd vcc nc 1 gnd vcc vcc vcc gnd gnd gnd gnd vcc gnd gnd vcc gnd gnd y2 vcc gnd vcc y1 nc 1 gnd y0 reset i/o 26 i/o 23 i/o 19 i/o 16 i/o 14 i/o 6 i/o 2 i/o 252 i/o 251 i/o 248 i/o 247 i/o 243 i/o 240 i/o 237 i/o 234 i/o 231 i/o 227 i/o 225 i/o 229 i/o 232 i/o 235 i/o 239 i/o 242 i/o 244 i/o 255 i/o 3 i/o 7 i/o 10 i/o 12 i/o 22 i/o 25 i/o 28 i/o 32 i/o 30 i/o 29 i/o 27 i/o 24 i/o 21 i/o 18 i/o 15 i/o 11 i/o 8 i/o 4 i/o 0 i/o 254 i/o 250 i/o 246 sdi/ tdi i/o 236 i/o 233 i/o 230 i/o 226 i/o 224 i/o 221 i/o 218 i/o 220 i/o 223 i/o 222 i/o 219 i/o 216 i/o 215 i/o 211 i/o 207 i/o 205 i/o 203 i/o 209 i/o 206 i/o 204 i/o 199 i/o 195 i/o 194 i/o 188 i/o 187 i/o 183 i/o 181 i/o 180 i/o 175 i/o 172 i/o 176 i/o 178 i/o 174 i/o 173 i/o 170 i/o 168 i/o 171 i/o 167 i/o 164 i/o 162 i/o 159 i/o 148 i/o 145 i/o 141 i/o 137 i/o 133 i/o 129 i/o 125 i/o 121 i/o 117 i/o 113 i/o 110 i/o 100 i/o 95 i/o 92 i/o 90 i/o 93 i/o 96 i/o 97 i/o 102 i/o 105 i/o 108 i/o 118 i/o 122 i/o 126 i/o 128 i/o 132 i/o 136 i/o 139 i/o 143 i/o 146 i/o 149 i/o 152 i/o 155 i/o 157 i/o 156 i/o 153 i/o 150 i/o 140 i/o 138 i/o 135 i/o 131 i/o 127 i/o 116 i/o 114 i/o 111 i/o 107 i/o 104 i/o 101 i/o 98 i/o 99 i/o 103 i/o 106 i/o 109 i/o 112 i/o 115 i/o 119 i/o 120 i/o 123 i/o 124 i/o 130 i/o 134 i/o 142 i/o 144 i/o 147 i/o 151 i/o 154 goe 0 goe 1 i/o 158 i/o 160 sdo/ tdo i/o 165 i/o 163 i/o 161 trst/ nc 1 i/o 169 i/o 166 i/o 177 i/o 179 i/o 182 i/o 186 i/o 185 i/o 184 i/o 191 i/o 190 i/o 189 i/o 192 i/o 193 i/o 196 i/o 197 i/o 198 i/o 200 i/o 201 i/o 202 i/o 212 i/o 208 i/o 213 i/o 210 i/o 217 i/o 214 i/o 228 i/o 238 i/o 241 i/o 245 i/o 249 i/o 253 i/o 1 i/o 5 i/o 9 i/o 13 i/o 17 i/o 20 i/o 31 i/o 34 i/o 36 i/o 39 i/o 43 i/o 46 i/o 50 i/o 48 i/o 44 i/o 54 i/o 51 i/o 49 i/o 47 i/o 52 i/o 53 i/o 55 i/o 59 i/o 58 i/o 57 i/o 56 i/o 61 i/o 62 i/o 63 i/o 60 i/o 66 i/o 64 i/o 65 i/o 70 i/o 69 i/o 68 i/o 67 i/o 71 i/o 72 i/o 75 i/o 77 i/o 79 i/o 83 i/o 81 i/o 78 i/o 76 i/o 80 i/o 84 i/o 87 i/o 88 i/o 85 i/o 82 i/o 86 i/o 89 i/o 91 i/o 94 i/o 73 i/o 74 i/o 45 i/o 42 i/o 40 i/o 41 i/o 38 i/o 37 i/o 35 i/o 33 mode/ tms sclk/ tck ispen / bscan
specifications isplsi 3256e 15 part number description device number grade blank = commercial isplsi 3256e xxx x xxxx speed 100 = 100 mhz f max 70 = 70 mhz f max power l = low package m = mqfp b320 = bga device family x 0212/3256e ordering information table 2-0041/3256e family f max (mhz) 100 70 ordering number package 304-pin mqfp 304-pin mqfp t pd (ns) 10 15 isplsi isplsi 3256e-100lm 100 320-ball bga 10 isplsi 3256e-100lb320 isplsi 3256e-70lm 70 320-ball bga 15 isplsi 3256e-70lb320 commercial

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